The return of SLI... Nvidia style

[Hamel]

This won't be a cheap alternative to AlienRipOff's dual card tech. At least not right now.

You'll need a mobo with two PCI express slots, and it's for Xeon processors anyway.

PCI-E is such a miserable waste~ we're not even stressing out AGP; the bottlenecks are everywhere else. It's a money grab. That's all it is.

Check Slashdot if you want to know everything.

[phongn]

This won't be a cheap alternative to AlienRipOff's dual card tech. At least not right now.

You'll need a mobo with two PCI express slots, and it's for Xeon processors anyway.

No, you need a motherboard with two PCIe x16 slots. It just so happens that at the moment only Xeon chipsets will have two PCIe x16 slots (most consumer motherboards have a PCIe x20 interface -- one x16 slot and four x1 slots).

EDIT: nVidia's nForce 4 looks like it'll have dual PCIe x16 slots.

EDIT2: Hrm, maybe not. It looks like -- at least for now -- one card will be run in x16 and the other in x8 mode, which should be more than enough bandwidth for now.

PCI-E is such a miserable waste~ we're not even stressing out AGP; the bottlenecks are everywhere else. It's a money grab. That's all it is.

Uh, no. PCIe requires fewer wires (serial vs. parallel signalling) and even your basic PCIe x1 slot can do 250MB/sec in both directions simultaneously. That's a damn sight better than bog-standard PCI and the best part is that said bandwidth is per slot. PCI bandwidth is shared across the entire bus.

Yes, you could get around those bandwidth problems by going to 64-bit and/or 66MHz slots, or by going to PCI-X, but those are expensive solutions (need a lot of wires).

[Vertigo1]

Don't you mean 64-bit Phongn?

[The Kernel]

You know, it really doesn't matter that the 9xx chipsets only support 20 PCIe lanes. PCIe natively supports a bridge solution (much like Alienware is going to use in their ALX setups) so two seperate PCIe x16 connectors can share the same x16 lane. Bandwidth shouldn't be much of a concern in this scenario, although load balancing and bus allocation might be.

[DaveJB]

Or they could just split the 16x lane, sending two 8x lanes to a pair of 16x slots.

[The Kernel]

Or they could just split the 16x lane, sending two 8x lanes to a pair of 16x slots.

How are you going to keep it pin compatible with x16 slots? They need to have the 16-active lanes or else the native x16 hardware wouldn't work unless you put in some kind of chip that translated the x8 signals into x16 and vice-versa. Considering you'd need two of them AND the fact that the bridge solution is less complex (not to mention already availible) I would think that the bridge makes more sense.

[DaveJB]

nVidia have said that the NV45 can work with either a true 16x slot, or a pseudo-x16 slot made from an x8 lane.

From the Tech Report:

One of the big challenges for those assembling NVIDIA SLI systems will be finding the right motherboards that will support two graphics cards. The only workable motherboard options so far appear to be workstation-class dual Xeon boards. I have a hunch we should see some more specific information about these motherboards announced today. These boards have a pair of PCI Express X16 slots, but the electrical connections to the second PCI Express slot are only eight lanes, or X8 bandwidth. That's still gobs of bandwidth—effectively double what you'd get from AGP 8X—so it shouldn't be a problem. NVIDIA says the card in the full PCI-E X16 slot will be the master card, and the other will operate as the slave.

The translation circuitry is probably built into the PCI-E-to-AGP bridge that NV45 uses. Of course, it depends whether the NV45 will operate with both cards on an x8 slot - if it won't, then a motherboard-level bridge would be the best solution.

[The Kernel]

nVidia have said that the NV45 can work with either a true 16x slot, or a pseudo-x16 slot made from an x8 lane.

From the Tech Report:

One of the big challenges for those assembling NVIDIA SLI systems will be finding the right motherboards that will support two graphics cards. The only workable motherboard options so far appear to be workstation-class dual Xeon boards. I have a hunch we should see some more specific information about these motherboards announced today. These boards have a pair of PCI Express X16 slots, but the electrical connections to the second PCI Express slot are only eight lanes, or X8 bandwidth. That's still gobs of bandwidth—effectively double what you'd get from AGP 8X—so it shouldn't be a problem. NVIDIA says the card in the full PCI-E X16 slot will be the master card, and the other will operate as the slave.

The translation circuitry is probably built into the PCI-E-to-AGP bridge that NV45 uses. Of course, it depends whether the NV45 will operate with both cards on an x8 slot - if it won't, then a motherboard-level bridge would be the best solution.

Interesting, looks like they've been planning this SLI thing for some time.

[Xon]

PCI-E is such a miserable waste~ we're not even stressing out AGP; the bottlenecks are everywhere else.

You've never tried to read data from the ASP bus have you?

While write proformance is acceptable, read preformance is shocking. This means that you can not transfer data both ways at fullspeed, and that is required for more complex graphics handling.

The AGP, and PCI buses are horrible limited solutions, the sooner they fall by the wayside the better.

Also PCIe is more than just a improved version of the AGP bus. No longer will transfering a large file to memory reduce the system to a crawl by saturating the PCI bus bandwidth.

The PCI bus is a horrible horrible thing. Shared bandwidth for all the devices attached is practically unworkable these days.

[Pu-239]

I'm not clear on the relation between AMD64, Hypertransport, and PCI Express. Can anyone explain this to me? I'm rather ignorant when it comes to hardware, and one of my friends plans to get a dual Opteron.

[phongn]

I'm not clear on the relation between AMD64, Hypertransport, and PCI Express. Can anyone explain this to me? I'm rather ignorant when it comes to hardware, and one of my friends plans to get a dual Opteron.

AMD64 uses Hypertransport I/O to communication between processors and to the controller for external devices like the PCI bus or PCIe switch.

[Hamel]

Rofl. Looks like I got owned.

Nforce4 will have 2 PCIe slots so it looks like a cheaper solution will come, at least by the 4th quarter

[phongn]

Nforce4 will have 2 PCIe slots so it looks like a cheaper solution will come, at least by the 4th quarter

Yeah, I saw that but it'll probably be pricey. I wonder if they're both true x16 slots.

[Hamel]

Alienware had this to say about SLI:

“Should Nvidia’s SLI technology ultimately prove faster than Alienware’s Video Array, we will offer it to our customers as soon as it becomes commercially available,” stated Frank Azor, senior vice-president and general manager of Alienware’s Worldwide Product Group. “Either way, we will continue to develop and optimize Video Array for all non-Nvidia graphics solutions, such as those from ATI, 3D Labs, Matrox, and any other manufacturers. Our sole interest is in offering technology that provides the very best computing experience possible to Alienware customers.”

[darthdavid]

Alienware had this to say about SLI:

“Should Nvidia’s SLI technology ultimately prove faster than Alienware’s Video Array, we will offer it to our customers as soon as it becomes commercially available,” stated Frank Azor, senior vice-president and general manager of Alienware’s Worldwide Product Group. “Either way, we will continue to develop and optimize Video Array for all non-Nvidia graphics solutions, such as those from ATI, 3D Labs, Matrox, and any other manufacturers. Our sole interest is in offering technology that provides the very best computing experience possible to Alienware customers.”

You know what that says to me? Dual X-800 Array.